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Lead Hardware Verification Engineer
Not specifiedFull-timeHardware EngineeringCloud ComputingInternet Services
Lead verification of digital design blocks and full-chip systems on chip using hardware emulation. Work with design, software, and post-silicon validation teams to debug issues, assess coverage, and close verification gaps before tape-out.
Responsibilities
- Plan and lead digital-design-block verification by interpreting specifications and defining verification scenarios with design engineers.
- Develop, run, and debug full-chip and SoC tests on emulation platforms.
- Collaborate with design engineers to debug tests and verify functional correctness.
- Define coverage measures for stimulus and corner cases; work with software and post-silicon validation teams to reproduce failures on emulation.
- Analyze coverage, identify verification gaps, track progress toward tape-out, and implement improved verification and emulation methods.
Requirements
- Bachelor’s degree in computer science, electrical engineering, or equivalent practical experience.
- At least 10 years of full-chip or SoC verification experience, including test definition, creation, execution, and debug.
- Experience developing full-chip or SoC tests using tools or environments such as ASM, C, C++, Perspec, Threadmill, operating systems, or drivers.
- Experience running and debugging RTL, firmware, or software on hardware emulation platforms or FPGAs.
- Experience with design-debug tools such as Verdi or Verisium.
- Coding and scripting experience in C, C++, Perl, TCL, or Python.
Nice to have
- Experience with EDA tools, automation, and verification-flow improvements.
- Verilog or SystemVerilog design experience.
- Embedded software or firmware experience, including Linux drivers or firmware validation.
- Knowledge of RTL-to-emulation and FPGA flows, emulation test benches, and SoC architecture and interfaces.