Engineering Manager, PCIe Physical Layer Firmware
Lead a team of physical-layer firmware engineers responsible for PCIe link behavior across a networking hardware portfolio.
Responsibilities
- Lead and develop a team of physical-layer firmware engineers as a hands-on player-coach.
- Own delivery for PCIe link bring-up, equalization, recovery, and physical-layer customer escalations.
- Partner with chip design, architecture, software, validation, and customer engineering teams to identify root causes.
- Provide technical direction during triage and distinguish physical-layer issues from other fault domains.
- Promote AI-assisted triage, debugging, and engineering knowledge capture.
Requirements
- Degree in Electrical Engineering, Computer Science, Computer Engineering, or equivalent experience.
- At least 8 years of engineering experience, including 3 years in engineering management or equivalent technical leadership.
- Strong knowledge of PCIe link training, equalization, recovery flows, and cross-generation behavior.
- Demonstrated ability to investigate link issues using state traces and eye diagrams with silicon and signal-integrity teams.
- Experience developing engineers, managing delivery cadence, and prioritizing under constraints.
- Clear communication skills across engineering teams, partner groups, and customers.
Nice to have
- Hands-on PCIe bring-up on silicon, signal integrity, lane margining, or cross-generation interoperability experience.
- Experience with high-speed SerDes, thermal-sensitive link issues, or customer escalations.
- Practical use of AI or machine-learning tools for engineering analysis and knowledge capture.
- Familiarity with networking products, Linux, Python scripting, and hardware/software boundaries.