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Develop and integrate firmware for Ethernet switch products, collaborating with hardware, ASIC, architecture, and software teams. The role covers the development lifecycle from architecture through integration testing.

Define and implement design-for-test (DFT) technologies for networking chips, working across design, verification, backend, and production testing teams.

Develop power-aware architectures and optimization methods for networking silicon across product development. Collaborate with hardware, software, ASIC design, verification, and platform teams to improve power consumption.

Join a silicon design team developing high-speed network switch chips. The role focuses on designing and verifying chip units and modules, with attention to power, area, and performance.

Develop and support clock-related design flows and automation for SoC and networking chips, contributing to integration and design implementation across projects.

Design physical implementation for high-speed networking silicon, working across RTL-to-GDS development and optimizing power, area, and performance.

Join a networking silicon engineering team designing high-speed communication chips. Work on challenging block and top-level designs, optimizing power, performance, and area.

Design physical blocks for high-speed networking chips, optimizing power, area, and performance. Work across the chip development flow, from synthesis through physical verification, and contribute to flow development.

Join a networking silicon engineering team to implement and optimize physical designs for high-speed communication chips.

Contribute to the development of Ethernet switch systems, supporting power integrity from concept through design, verification, and release.