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Senior SoC Power Architect
Not specifiedFull-timeHardware EngineeringSemiconductorsComputer Hardware
Develop power-aware architectures and optimization methods for networking silicon across product development. Collaborate with hardware, software, ASIC design, verification, and platform teams to improve power consumption.
Responsibilities
- Develop architectures, algorithms, models, and methodologies to reduce power consumption across product development.
- Research power optimization techniques and power modeling approaches.
- Define power-aware architecture requirements and implementation strategies, balancing power, performance, area, and design execution.
- Work with board, package, and physical design teams to address power delivery, di/dt, thermal, and signal-integrity constraints.
- Coordinate with software, ASIC design, verification, and platform teams to drive end-to-end power improvements.
Requirements
- Bachelor’s or master’s degree in electrical engineering or a related field.
- At least 5 years of experience in ASIC design, microarchitecture, architecture, or performance.
- Strong fundamentals in electrical engineering, digital design, front-end and back-end practices, power analysis, and characterization.
- Ability to drive complex work across multiple disciplines and teams.
Nice to have
- Hardware architecture experience with high-end ASICs.
- Experience in computer architecture focused on power management, optimization, characterization, or modeling.
- A track record of power or performance improvements in silicon products.
- Knowledge of physical design practices and their interaction with power architecture.