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Senior Power Integrity Engineer
·Israel
Not specifiedFull-timeHardware EngineeringSemiconductorsNetworking
Lead power integrity engineering for next-generation network adapters. Define power architecture, own PDN design, perform electromagnetic simulations, and validate designs in the lab. Collaborate with vendors and layout teams to deliver high-performance boards.
Responsibilities
- Lead power integrity definition and implementation for board-level designs from concept to production.
- Define power core architecture and serve as technical lead for power-related performance and debug activities.
- Work closely with power supply vendors to align solutions and optimize configuration files for programmable regulators.
- Own power delivery network design including rail partitioning, decoupling strategy, VR selection, and dynamic load support.
- Perform system-level power integrity simulations in frequency and time domains, co-simulating circuits and PDN models.
- Create and maintain board PI design guidelines for stackup, materials, breakout, routing, decoupling, and placement.
- Use advanced 2D/3D EM tools to model and optimize vias, planes, connectors, sockets, and other interconnect elements.
- Perform lab characterization and correlation using VNA, TDR, and high-bandwidth oscilloscopes, refining models based on measurements.
Requirements
- B.Sc. in Electrical Engineering or equivalent experience.
- 5+ years of industry experience in signal and/or power integrity for high-speed board or system designs.
- Strong understanding of electromagnetics, transmission line theory, and PDN behavior.
- Expert proficiency with EM and PI tools (Ansys HFSS/Q3D/SIwave, CST, or equivalent) and SPICE-based simulations.
- Proven experience in PDN analysis including model generation, impedance targets, resonance mitigation, and time-domain noise simulations.
- Hands-on lab experience with VNA, TDR, and oscilloscopes for PI/SI validation and model correlation.
- Ability to work independently in a multi-disciplinary environment with strong ownership and interpersonal skills.
Nice to have
- Deep experience designing PDNs for complex multilayer boards with high-current, low-voltage rails for advanced ASICs.
- Background in PI co-simulation flows, PSIJ analysis, and end-to-end system modeling (die-package-board).
- Experience with scripting and data analysis using MATLAB, Python, or C for simulation automation.
- Exposure to advanced packaging and interconnect technologies (TSV, high-speed connectors, advanced laminates).
- Practical knowledge of PCB fabrication, product qualification flows, and lab debug of high-speed boards.