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Senior Emulation Verification Engineer
·Israel
On-siteFull-timeHardware EngineeringInformation TechnologyCloud ComputingSemiconductors
Seeking a Senior Emulation Verification Engineer to drive full-chip/SoC verification on emulation platforms for custom silicon powering cloud and consumer products. The role involves test development, RTL/firmware debug, and coverage analysis in a collaborative, innovative environment.
Responsibilities
- Plan and execute verification of digital design blocks by understanding specifications and defining key verification scenarios with design engineers.
- Develop, execute, and debug full-chip/SoC tests on emulation platforms.
- Collaborate with design engineers to debug tests and ensure functional correctness of design blocks.
- Define and implement coverage measures to capture stimulus and corner-case scenarios, and work with software and post-silicon validation teams to reproduce failures on emulation.
- Drive coverage analysis to identify verification gaps and demonstrate progress towards tape-out.
- Explore and implement new verification and emulation methodologies.
Requirements
- Bachelor's degree in Computer Science, Electrical Engineering, or equivalent practical experience.
- 8 years of experience with full-chip/SoC verification, including test definition, creation, execution, and debug.
- Experience developing full-chip/SoC tests using ASM, C, C++, Perspec, Threadmill, OS, or drivers.
- Experience with execution and RTL/firmware/software debug on hardware emulation (e.g., ZeBu Server, Palladium, Veloce) or FPGA (e.g., EP, HAPS, Protium).
- Experience with design debug tools such as Verdi or Verisium.
- Experience with coding and scripting in C, C++, Perl, TCL, or Python.
Nice to have
- Experience in embedded software and firmware, such as Linux drivers or firmware validation.
- Experience with associated EDA tools, automation, and flow enhancements.
- Experience with coding in Verilog/SystemVerilog for design.
- Understanding of SoC architecture and interfaces (e.g., CPU, DDR, PCIe, interconnect, Ethernet).
- Understanding of RTL to emulation/FPGA flows, including emulation test benches (transactors/accelerated VIPs, hybrid, in-circuit emulation).