Senior Chip Design Engineer
Responsible for designing and implementing next-generation switch silicon chips, including RTL design, microarchitecture planning, verification, synthesis, and timing closure. Collaborate with cross-functional teams to deliver high-performance, low-latency communication devices.
Responsibilities
- Work in a design/verification team developing core units within Switch silicon.
- Plan microarchitecture and RTL verification environments for units and modules.
- Design RTL of units/blocks according to architectural specifications with focus on power, area, and performance.
- Perform RTL synthesis, timing analysis, and support verification and silicon post-TO activities.
- Collaborate with Architecture, u-arch, Full chip Micro-Architecture, BE, and FW teams.
Requirements
- B.Sc. in Electrical Engineering or Computer Engineering or equivalent experience.
- 5+ years of experience in RTL design.
- Team player with good communication and interpersonal skills.
Nice to have
- Knowledge in network protocols and/or HPC and distributed calculations.