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Principal Formal Verification Engineer
·Israel
Not specifiedFull-timeHardware EngineeringSemiconductors
Lead formal verification for complex digital blocks and systems in high-performance silicon. Define strategies, develop testbenches and properties, guide teams, and deploy advanced formal tools to ensure design correctness and convergence.
Responsibilities
- Define and execute advanced formal verification strategies for complex digital blocks and systems.
- Lead formal activities across multiple projects, ensuring scalability, completeness, and convergence.
- Guide the development of formal testbenches, properties, assertions, and coverage models.
- Collaborate with architects, RTL designers, and DV teams to identify formal targets and maximize verification efficiency.
- Provide technical leadership and mentoring to formal engineers and grow formal expertise.
- Evaluate and deploy state-of-the-art formal tools, flows, and methodologies to improve coverage and impact.
Requirements
- BSc or MSc in Electrical/Computer Engineering, Computer Science, or Mathematics.
- 15+ years of hands-on experience in Formal Verification within the semiconductor industry.
- Proven track record of formal verification execution.
- Deep understanding of formal concepts, abstraction techniques, property development, and convergence strategies.
- Strong analytical, debugging, and problem-solving skills.
- Excellent communication and collaboration skills.
Nice to have
- Passion for formal verification with desire to innovate and elevate practice.
- Visionary mindset eager to push boundaries of formal adoption and impact.
- Strong desire to influence product development using formal insights for architectural and design decisions.
- Proven ability to work collaboratively with thought leadership in formal domain.