ASIC Engineer
Responsible for verification of advanced silicon devices, including UVM-based testbenches, debug, and post-silicon validation.
Responsibilities
- Review micro-architecture specifications
- Implement UVM-based verification environment
- Collaborate with design engineers to achieve coverage closure
- Work with firmware/lab teams to verify chip flows
- Perform debug, root-cause analysis, and post-silicon validation in the lab
Requirements
- B.Sc./M.Sc. in Electrical Engineering
- 2+ years of experience
- Knowledge of UVM and functional verification methodologies
Nice to have
- Experience with MATLAB simulations and bit-exact modeling
- Familiarity with mixed-signal systems
- Hands-on experience with Clock Domain Crossing (CDC)