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Join an engineering team designing and verifying signal and power integrity for electronic systems, from concept through release.

Own software and system architecture for DPU management, QoS, performance, telemetry, and observability features. Work across software, firmware, hardware, validation, product, and customer teams from early architecture through production readiness for AI and cloud datacenters.

Join a software architecture team shaping networking devices and data center platforms. Work with system architects and software, firmware, hardware, and product teams to develop component-level and system-level designs.

Join a networking hardware team to define future network adapter chip architectures and build simulation tools that guide design and performance decisions.

Join an AI networking acceleration team developing an optimized, open-source inference framework for high-performance computing and data-center environments.

Join an AI networking acceleration team developing an open-source, performance-focused inference framework for supercomputers and data centers.

A technology company is seeking an experienced DFT design engineer to develop and integrate design-for-test components for switch, network interface, and SoC products. The role spans feature definition, RTL implementation, integration, tape-out, and silicon testing.

Join a networking silicon engineering team designing high-speed communication chips. You will implement and optimize physical designs and support integration and sign-off across projects.

Develop AI, machine learning, and large language model solutions that improve chip design and verification workflows. Work with design and verification specialists to integrate solutions across projects.

Develop and support clock-related design flows and automation for SoCs and networking chips, contributing to integration and design closure across projects.