Senior Physical Design Engineer
Join a networking silicon engineering team designing high-speed communication chips. You will implement and optimize physical designs and support integration and sign-off across projects.
Responsibilities
- Design complex physical design units and ensure integration into builds
- Run, debug, and approve place-and-route and verification flows across projects
- Implement, plan, and optimize physical designs for chips
Requirements
- Bachelor’s or master’s degree in Electrical Engineering
- At least 5 years of hands-on physical design and place-and-route experience
- Strong knowledge of physical design methodology, including synthesis, floorplanning, clock-tree synthesis, and routing
- Experience with sign-off stages such as STA, physical verification, LEC, and EMIR
- Knowledge of advanced silicon process technologies
- Familiarity with physical design EDA tools, including Synopsys and Cadence
Nice to have
- AI prompting experience or interest in learning AI tools
- Experience with Linux environments
- TCL, Python, or shell scripting skills
- Experience collecting and analyzing data
- Understanding of chip and die verification