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Join a physical design team developing CAD methodologies and tools for ASIC design flows, from RTL to GDS, for next-generation networking devices.
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Lead physical design work for complex VLSI devices, contributing to backend methodology and design flows from RTL to GDS.
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Create a profile to see your match.
Create a profile to see your match.
Create a profile to see your match.
Create a profile to see your match.
Develop a functional simulator and behavioral models for a family of silicon devices, working with ASIC architecture, software, and hardware teams.
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