Senior Physical Design Engineer
An Israel-based semiconductor engineering team is seeking a senior physical design engineer to develop high-speed communication chips and optimize power, area, and performance.
Responsibilities
- Perform block-level physical design according to specifications and power, area, and performance constraints.
- Resolve complex timing and congestion issues across high-cell-count and high-speed blocks.
- Execute RTL-to-GDS development activities, including synthesis, power and clock distribution, place and route, timing closure, power analysis, noise analysis, and physical verification.
- Contribute to the development of physical design flows.
Requirements
- Bachelor’s or master’s degree in electrical engineering, computer engineering, or equivalent work experience.
- At least 5 years of physical design experience.
- Experience with RTL-to-GDS flows and methodologies.
- Knowledge of physical design flows, including place and route, static timing analysis, and physical verification.
- Deep understanding of physical construction and integration.
- Strong knowledge of LVS and DRC verification methodologies.
- Familiarity with physical design EDA tools such as Synopsys and Cadence.
- Ability to work effectively as part of a team.