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Senior DFT Lead
Not specifiedFull-timeHardware Engineering
Lead design-for-test architecture, implementation, verification, and production support for ASIC and edge-AI hardware projects. Provide technical direction, develop DFT methodologies and automation, and guide execution through tapeout and silicon bring-up.
Responsibilities
- Drive DFT design, implementation, and verification for ASIC solutions.
- Develop DFT strategies and architectures, including hierarchical DFT, MBIST, and ATPG.
- Create DFT flows, automation, and methodology.
- Coordinate with design, verification, and physical-design teams to manage requirements and dependencies.
- Plan, execute, track, and assess the quality of DFT work across the silicon project lifecycle.
- Lead DFT sign-off through tapeout and support devices through production.
- Oversee team planning and deliverables and provide technical mentoring and guidance.
Requirements
- Bachelor’s degree in Electrical Engineering, Computer Engineering, or a related field, or equivalent practical experience.
- At least 8 years of experience in design for test, spanning DFT architecture through post-silicon production support.
- At least 4 years of people-management experience.
- Experience with DFT design and verification across multiple projects.
- Experience defining DFT specifications and architectures and integrating DFT into designs.
- Experience with DFT techniques, industry tools, physical-design flows, and DFT verification flows.
- Experience leading DFT activities throughout the ASIC development lifecycle.
Nice to have
- Master’s degree in Electrical Engineering or a related field.
- Experience with post-silicon debugging, testing, or product engineering.
- Experience with JTAG and iJTAG protocols and architectures.
- Experience with SoC development cycles, silicon bring-up, and silicon debugging.
- Knowledge of fault modeling techniques.