C
Mid-Level DFT Engineer
Not specifiedFull-timeHardware EngineeringNetworking EquipmentSemiconductors
Develop and implement design-for-testability features for silicon products, supporting the lifecycle from pre-silicon design through production qualification and post-silicon debug.
Responsibilities
- Develop and implement DFT features for testable and manufacturable silicon designs.
- Support the full product lifecycle from pre-silicon design to post-silicon debug and production qualification.
- Collaborate with hardware teams throughout the silicon lifecycle.
- Implement ATPG, scan compression, and memory BIST techniques.
- Debug silicon failures and perform root-cause analysis to improve yield and reliability.
- Establish DFT methodologies and best practices for future designs.
Requirements
- Bachelor’s degree in Electrical Engineering or a related field.
- At least 3 years of hands-on experience in one or more DFT areas, including scan insertion, built-in self-test, boundary scan, or silicon debug.
- Experience with Automatic Test Pattern Generation methodologies.
Nice to have
- Experience establishing DFT methodologies from design through high-volume production.
- Ability to learn new concepts and adapt to evolving technologies.
- Strong communication and presentation skills.
- System-level understanding of networking and silicon solutions.