Empleos de Hardware Engineering

Develop FPGA designs for complex systems, derive FPGA requirements from system and cross-disciplinary requirements, and lead integration with other engineering teams. The role is based in Kiryat Bialik.

Work on physical design and methodology for next-generation processor chips in advanced CMOS processes. Collaborate with local and global engineering teams to integrate designs and achieve design closure.

Lead hands-on development and commissioning of high-power and pulsed-power systems for a fusion platform and laboratory infrastructure. The role combines technical ownership with team leadership and cross-functional coordination.

Lead the development of electronic systems from requirements definition and design through testing, production transfer, and operational service. Coordinate multidisciplinary engineering teams and external partners while meeting technical, cost, weight, power, quality, and schedule targets.

A space-industry R&D team seeks an engineer to develop robotics and imaging test setups, integrate hardware, automate data collection, and support laboratory systems.

Help develop and evaluate hardware models for next-generation neural processing units. Collaborate with hardware design, verification, and compiler teams, and provide technical support for customer engagements. The role includes leading work packages, setting technical direction, and mentoring less-

Lead the development of automated test equipment for RF, digital and mixed-signal products, from test-system architecture and strategy through production deployment and support.

Lead FPGA and electronics development for a multidisciplinary quantum computing platform. This hands-on role spans architecture, RTL implementation, PCB development, system integration, and laboratory validation.

Lead physical design and silicon delivery for complex SoCs, including AI hardware. The role covers design methodology, implementation strategy, team execution, and tape-out.

A semiconductor engineering team is seeking a senior physical design engineer to deliver complex, high-performance SoCs through tape-out on advanced FinFET process nodes. The role combines hands-on implementation, signoff, clocking, automation, and collaboration with ASIC foundries or design service