Post-Silicon Validation Engineer
Join a silicon development team validating PHY and SerDes communication systems for advanced networking devices. The role combines lab work in Caesarea and Netanya, system-level debugging, and automation development.
Responsibilities
- Validate PHY and SerDes communication IP after silicon release
- Characterize high-speed links and assess link stability across PVT corners
- Develop automation infrastructure and validation tools
- Perform system-level debugging across hardware, software, and silicon
- Work with PHY firmware, calibrations, system definitions, and operations
- Conduct hands-on laboratory testing of advanced networking silicon
Requirements
- B.Sc. or M.Sc. in Electrical Engineering, Computer Science, or an equivalent field
- Experience validating PHY or SerDes systems, including high-speed SerDes characterization, link stability, or PVT corner testing
- Ability to debug systems and isolate faults across hardware, software, and silicon
- Strong scripting or programming skills in Python or C++
- Practical experience using oscilloscopes, BERTs, and spectrum analyzers
Nice to have
- Knowledge of signal processing and communication theory, including DSP, modulation, and link-layer communication
- Linux proficiency and experience with Git
- Experience with Jenkins or other DevOps automation frameworks
- GUI development experience and database familiarity
- Understanding of PCIe and Ethernet standards
Benefits
- Professional growth opportunities
- Hands-on work with advanced silicon technologies
- Multidisciplinary collaboration in an integrated hardware and software development center