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Senior Full-Chip Verification Infrastructure Engineer
On-siteFull-timeQA & Test AutomationElectronics ManufacturingData Infrastructure
Join a networking silicon engineering team to develop and verify next-generation NICs while improving the simulation infrastructure that supports verification flows.
Responsibilities
- Identify verification-flow bottlenecks and develop solutions to improve simulation throughput.
- Build frameworks, optimize regressions, and create tooling for verification acceleration.
- Develop across SystemVerilog/UVM, Specman, Python, C/C++, and scripting environments.
- Debug and resolve cross-block system-level issues using knowledge of chip microarchitecture and features.
- Drive full-chip verification execution for networking devices.
- Collaborate with Architecture, microarchitecture, Firmware, and NIC teams.
- Use AI coding tools and frameworks to accelerate verification and infrastructure development.
Requirements
- Bachelor’s degree in Electrical Engineering or Computer Engineering with strong academic results, or equivalent experience.
- At least 8 years of experience in verification, hardware simulation, or infrastructure development for silicon projects.
- Experience improving and scaling regression frameworks, simulation performance, verification tooling, and flow automation.
- Strong debugging, problem-solving, and analytical skills.
- Proactive approach to adopting new methodologies and coding tools.
- Good communication and interpersonal skills.
Nice to have
- Experience using AI tools for verification automation or infrastructure acceleration.
- Experience working in multi-language development environments.