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Staff Digital Design Engineer
·Israel
Not specifiedFull-timeHardware EngineeringSemiconductor ManufacturingElectrical & Electronic ManufacturingComputer Hardware Manufacturing
Join R&D team to drive digital design and physical implementation of complex SoCs. Responsible for synthesis, place and route, static timing analysis, timing constraints, and full RTL-to-GDSII flow. Requires 4+ years VLSI backend experience and engineering degree.
Responsibilities
- Own synthesis, place and route, and static timing analysis flows.
- Collaborate with IP and SoC project teams on IP designs.
- Perform multi-scenario STA, timing/SDC constraint development and verification.
- Manage chip timing, including synthesis, P&R, and timing regression.
- Execute RTL tasks: simulation, linting, synthesis, logic equivalence checks, and ATPG.
Requirements
- University degree in Electrical Engineering, Microelectronics, Embedded Systems, Physics, or similar technical field.
- At least 4 years of experience as VLSI Backend Engineer.
- Hands-on experience with full RTL to GDS-II flow for complex designs.
- Experience in scripting using TCL and Python.
- Excellent communication skills and team player spirit.
- Fluent English, both verbal and written.