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SOC Clock Distribution Engineer
Not specifiedFull-timeHardware EngineeringElectronics Manufacturing
Design and implement system-on-chip clocking for complex networking chips, collaborating with physical design, CAD, package design, software, DFT, and unit-level teams.
Responsibilities
- Design and implement SOC-level clock requirements
- Support chip-level design activities including partitioning, clock-domain crossing, trial synthesis, and design-quality checks
- Address functional and structural challenges, including functional debugging, physical-design readiness, and design-quality issues
Requirements
- Bachelor’s degree in Electrical Engineering or Computer Engineering
- At least 3 years of chip-design experience
- Hands-on physical-design experience with clock distribution in products with tight power, timing, and layout constraints
- Proficiency in at least one scripting language such as Perl, Python, Bash, or Tcl
Nice to have
- Experience delivering designs back to RTL, physical design, and other partner teams
- Strong commitment to quality
Benefits
- Competitive salary
- Comprehensive benefits package