Senior Staff Applications Engineer
Provide customer-facing engineering support for integrating memory subsystem IP into ASIC and SoC designs. Work with customers and cross-functional teams on integration, troubleshooting, validation, and silicon bring-up.
Responsibilities
- Guide customers through integrating memory subsystem IP into ASIC and SoC designs.
- Conduct integration reviews at customer milestones and troubleshoot issues throughout the SoC design flow.
- Resolve customer issues involving RTL simulation, synthesis, floorplanning, timing closure, and silicon or system bring-up.
- Support silicon bring-up and characterization in system environments.
- Document best practices, prepare application notes, and deliver customer training.
- Share customer feedback with cross-functional teams and contribute to product improvements.
- Keep current with interface protocols and industry standards; travel occasionally to customer sites for support, reviews, and bring-up activities.
Requirements
- Master’s degree and 10+ years of industry experience, or equivalent.
- 10+ years of experience in IP design, ASIC/SoC integration, or customer-facing engineering; candidates with strong silicon-debug experience and an academic background may also be considered.
- Strong understanding of ASIC design flows, including simulation and verification, RTL synthesis, floorplanning, physical design, and timing closure.
- Hands-on experience integrating and validating high-speed memory subsystem IP.
- Proficiency debugging RTL and gate-level simulations; familiarity with Design Compiler, Fusion Compiler, and PrimeTime.
- Experience with silicon bring-up and system-level characterization in laboratory environments.
- Knowledge of memory subsystem design flows and DDR/LPDDR protocols.