Senior Hardware Modeling Architect
Join an advanced hardware engineering team developing functional models and simulators for next-generation networking switches. The role connects hardware architecture and software, enabling design teams to explore, validate, and shape system behavior.
Responsibilities
- Develop functional models and simulators for switch hardware blocks and subsystems
- Build simulation infrastructure and toolchains for evaluating new hardware designs
- Define modeling strategy, coverage, and methodology for new switch architectures
- Own modeling features from design through delivery
- Collaborate with architecture, design, and verification teams to refine system behavior and methodologies
- Provide technical ownership and leadership across teams
Requirements
- Bachelor’s or master’s degree in electrical engineering, computer engineering, computer science, or equivalent experience
- At least 10 years of hands-on experience in chip design, verification or validation, RTL simulation, firmware, or embedded software
- In-depth knowledge of chip design and verification flows
- Strong understanding of hardware-software flows and system integration across diverse technology components
- Strong analytical, debugging, problem-solving, and written and verbal communication skills
- Ability to work independently and drive ideas from concept through execution
Nice to have
- Background in hardware validation or verification with an interest in software and modeling
- Hands-on experience with networking protocols
- Experience with UVM or other verification methodologies
- Familiarity with modern C++ and object-oriented design
- Experience with SystemC, TLM, or other hardware modeling frameworks