Senior Chip Design Verification Engineer
Responsible for verifying chip blocks according to specifications with focus on power, area, and performance. Requires B.Sc/M.Sc or equivalent experience and 5+ years RTL ASIC verification. Hybrid work mode.
Responsibilities
- Verify chip blocks according to specifications.
- Work on verification of encryption accelerators.
- Possibly involve micro-architecture and firmware collaboration.
Requirements
- B.Sc/M.Sc in Electrical/Communication/Computer Engineering or equivalent experience.
- 5+ years RTL Frontend ASIC verification.
- High level of English.
- Team player.
Nice to have
- Knowledge in Specman.
- Experience in encryption field.
- Experience in RTL Frontend ASIC Design.
- Knowledge in Verilog.