Principal Emulation Engineer
Join a new R&D center in Israel to drive emulation for complex AI infrastructure chips. As a Principal Emulation Engineer, you will own end-to-end emulation flows, debug system-level issues, and collaborate across hardware and software teams to ensure silicon quality and performance.
Responsibilities
- Execute end-to-end emulation flow from model generation and RTL synthesis to system-level testing and debugging.
- Work with next-generation emulation platforms (Zebu, Palladium, or Veloce) to implement cutting-edge methodologies.
- Maintain and evolve emulation flows to reduce compile times and increase execution speed.
- Drive initial model bring-up, identify and resolve complex bugs, and ensure rapid cycles from RTL to functional stability.
- Own technical blocks and drive them to completion independently.
- Partner with Firmware, Software, and Validation teams to debug complex system-level scenarios and ensure seamless hardware-software integration.
- Collaborate with Design and Verification teams to optimize emulation strategies.
Requirements
- Bachelor's degree in Electrical Engineering, Computer Engineering, or related field.
- 10+ years of hands-on experience in emulation at semiconductor companies.
- Deep expertise in emulation flows for large-scale chips using industry-standard emulators (Zebu, Palladium, or Veloce).
- Strong background in SystemVerilog for developing, testing, and debugging complex SoC designs.
- Experience developing and maintaining execution flows for building, running, and debugging emulation models.
- Proven ability to own technical blocks and drive them to completion independently.
Nice to have
- Master's degree in Electrical Engineering, Computer Engineering, or related field.
- Familiarity with EDA tools for Lint, Clock Domain Crossing (CDC), simulation, and synthesis.
- Proficiency in scripting languages such as Python or TCL for automation and flow enhancement.
- Experience with standard debug environments (e.g., Verdi).
- Knowledge of high-speed interface protocols (PCIe, Ethernet, CXL, UALink).
- Background in hardware-software co-verification methodologies.