Chip Design Verification Engineer
Join a chip design methodologies team developing shared verification solutions and improving the efficiency and quality of verification work.
Responsibilities
- Develop shared verification code and solutions for chip design teams.
- Create verification methodologies and infrastructure.
- Define verification scope and verify design correctness.
- Collaborate with design automation teams on solutions combining verification, simulation, and automation.
- Evaluate EDA tools and technologies and apply them to verification processes.
- Work with designers and verification specialists.
- Develop and deliver training sessions.
Requirements
- Bachelor’s degree in Electrical Engineering or Computer Science.
- At least 3 years of relevant experience.
- Exposure to design and verification tools.
- Strong interpersonal skills and a desire to innovate.
Nice to have
- Experience with Specman or SystemVerilog UVM.
- Understanding of simulation tools.
- Experience building test benches, evaluating coverage, and debugging simulation failures.