Senior SoC Power Architect
Lead the power architecture of next-generation custom system-on-chip designs, balancing performance, thermal constraints, and power delivery across the silicon development lifecycle. The role is based in Tel Aviv or Haifa, Israel.
תחומי אחריות
- Define and own SoC power architecture, including power domains, clocking structures, and power delivery network solutions.
- Architect power management policies such as dynamic voltage and frequency scaling, power gating, and state strategies.
- Define the hardware/software interface and specifications for the power management unit.
- Coordinate with architecture, RTL, physical design, packaging, and validation teams on power budgets and specifications.
- Develop high-fidelity power and performance models for early architectural evaluation.
- Lead pre-silicon power estimation and analysis to guide design decisions.
- Lead post-silicon power analysis and correlate laboratory measurements with pre-silicon models.
- Ensure power requirements are met from concept through tape-out.
דרישות
- Bachelor’s degree in Electrical Engineering, Computer Engineering, or equivalent practical experience.
- At least 10 years of experience in ASIC or SoC architecture or design focused on power optimization.
- Experience developing or using power and performance modeling tools to evaluate architectural trade-offs.
- Experience with low-power design techniques, including UPF or CPF, multi-voltage islands, power gating, and clock gating.
- Experience with on-chip power management IP.
יתרון
- Master’s degree or PhD in Electrical Engineering, Computer Engineering, or a related field.
- Experience analyzing full-chip power integrity and interactions among clocking, reset, and power sequencing.
- Experience with post-silicon bring-up, power calibration, thermal management, and laboratory debugging.
- Experience with data center or server SoC power architecture and management requirements.
- Experience with industry-standard EDA power tools and simulation environments.
- Familiarity with workload analysis for AI/ML, transcoding, and networking applications.