Senior DFT Engineer
Join a Design-for-Test team developing DFT architecture, verification, and post-silicon validation for advanced semiconductor chips. Own ATPG activities from planning through pattern generation, verification, silicon bring-up, and diagnosis, and develop automation flows to reduce production test 시간을
תחומי אחריות
- Own DFT/ATPG flows and implementation
- Lead ATPG work end to end, from architecture and planning through pattern generation, verification, silicon bring-up, and diagnosis
- Develop and maintain automation flows to reduce production test time
- Collaborate with chip design, backend, verification, and production testing teams
דרישות
- At least 5 years of hands-on DFT/ATPG experience
- Technical experience in DFT ASIC design and ATPG tools
- Experience with Mentor TestKompress and retargeting flows
- Strong scripting skills
- Bachelor’s degree in Electrical Engineering or Computer Engineering
יתרון
- Knowledge of scan, BIST, on-chip scan compression, fault models, ATPG, and fault simulation
- Experience with ATE and silicon bring-up
- Experience with TCL, Perl, Python, and Unix shell scripting