Senior Physical Design Engineer
Join a multinational physical design team developing advanced satellite system-on-chip devices, including radiation-hardened modem technologies, from design through production.
תחומי אחריות
- Implement complex SoCs, VLSI devices, and test chips at the physical level
- Integrate custom designs and third-party hard, soft, IO, CPU, and DSP IP
- Own block-level timing closure and manufacturing-check signoff
- Perform power planning and power analysis
- Develop block- and chip-level timing constraints with RTL design teams
- Insert DFT test structures and support chip-level integration, capture, and simulation
- Improve scripts and design-tool flows with internal teams, suppliers, vendors, and external design providers
דרישות
- Bachelor’s degree in Electrical Engineering, Computer Science, or a related field
- At least 8 years of physical design engineering experience
- Experience with COT/ASIC physical design flows, including synthesis, floorplanning, place and route, clock tree synthesis, parasitic extraction, static timing analysis, timing closure, physical verification, power analysis, formal verification, DFT/DFM, and ATPG
- Experience with deep-submicron process technologies at 28 nm or below
- Practical scripting experience with Tcl, Python, Perl, or similar languages
- Experience with Cadence or Synopsys EDA tool flows
- Experience working with logic design, third-party IP, library suppliers, EDA vendors, and subcontracted design service providers
הטבות
- Career development and growth opportunities
- Equal opportunity workplace with recruitment accommodations available