Senior Logic Design Engineer
Join an experienced hardware team developing next-generation silicon for AI and generative AI workloads. Own complex IP and subsystem design from microarchitecture through silicon, while helping advance AI-assisted engineering practices.
תחומי אחריות
- Define microarchitecture and design RTL for complex AI acceleration IPs and subsystems from concept through silicon.
- Make architectural and microarchitectural trade-offs involving performance, power, area, timing, and design complexity.
- Provide technical leadership and mentorship, establish design standards, and review RTL and microarchitecture.
- Advance the effective use of AI tools throughout the chip development flow.
- Collaborate with architecture, verification, DFT, and physical design teams through integration, timing closure, and bring-up.
- Lead pre-silicon debugging, root-cause analysis, and issue resolution.
דרישות
- Bachelor’s degree in Electrical Engineering, Computer Engineering, or an equivalent field.
- At least 6 years of hands-on logic design experience delivering complex RTL and microarchitecture to silicon.
- Experience with AI-assisted engineering tools, or a strong interest in applying AI to improve hardware development workflows.
- Expertise in Verilog and SystemVerilog for RTL design.
יתרון
- Experience designing AI/ML accelerators, datapaths, or compute-intensive IP.
- Understanding of deep learning or LLM workloads and their mapping to hardware.
- Familiarity with verification, design-for-test, physical design, and the full chip development cycle.