Senior ASIC Verification Engineer
Join a global semiconductor engineering team developing and verifying high-performance, low-power security engines and RISC-V processor IPs for CPU and SoC products.
תחומי אחריות
- Participate in microarchitecture development and document specifications
- Build SystemVerilog UVM verification environments for cryptographic and RISC-V IP
- Create verification and test plans to achieve complete coverage
- Debug and resolve defects with design engineers
- Deliver verified IP to cluster, functional coverage, and emulation-level verification
דרישות
- Bachelor’s degree in electrical engineering or computer engineering
- At least 5 years of experience verifying complex designs
- Proficiency in SystemVerilog and UVM methodology
- Strong interpersonal and teamwork skills
יתרון
- Experience with cryptographic RTL units such as AES, RSA, or PQC
- Experience with RISC-V or RISC-V peripherals
- Experience collaborating with engineers across China, India, and the United States
הטבות
- Competitive salary
- Generous benefits package
- Work in a global engineering environment