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Engineering Manager, ASIC and SoC Design
PresencialTiempo completoEngineering ManagementCloud ComputingData Infrastructure
Lead a team of ASIC designers and technical leads developing server-chip IP, subsystems, and SoCs from architecture through production. Partner with verification, physical design, and distributed engineering teams on high-performance, low-power silicon.
Responsabilidades
- Manage and mentor designers and technical leads across multidisciplinary, multisite teams.
- Lead IP, subsystem, and SoC design activities, including architecture definition, RTL coding, and block-level simulation.
- Own the VLSI design lifecycle from architecture through production.
- Plan, execute, track, and report progress for assigned engineering activities.
- Coordinate with internal customers across multiple activities and deliverables.
- Maintain RTL design quality through reviews, static checks, physical-design preparation, and power analysis.
Requisitos
- Bachelor's degree in electrical engineering, computer engineering, computer science, or a related field, or equivalent practical experience.
- 10 years of experience across the RTL design lifecycle from IP through SoC production.
- 8 years of experience managing execution teams.
- Experience with RTL design, design quality checks, physical-design-aware RTL coding, and power management.
Se valora
- Experience optimizing RTL synthesis for performance and power.
- Knowledge of low-power design, design-for-test, and physical design considerations.
- Experience with Python or Perl scripting.
- Knowledge of PCIe, UCIe, DDR, AXI, CHI, fabric interconnects, or ARM processors.
- Knowledge of SoC architecture, assertion-based formal verification, and high-performance, low-power design techniques.