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Staff Formal Verification Engineer
HíbridoTiempo completoHardware EngineeringSemiconductor ManufacturingComputer Hardware Manufacturing
Join a skilled hardware team developing next-generation silicon for AI/ML applications. Own formal verification across complex IP blocks and influence verification methodologies and environments.
Responsabilidades
- Own formal verification across complex IP blocks
- Build and evolve verification environments and methodologies
- Apply Cadence JasperGold to formal verification activities
- Collaborate with design, verification, and architecture teams globally
Requisitos
- Bachelor’s degree in electrical engineering, computer engineering, computer science, mathematics, or a related field
- At least 7 years of hands-on formal verification experience
- Strong hands-on experience with Cadence JasperGold
- Experience with property checking, connectivity, equivalence checking, X-propagation, coverage, and bug hunting
- Strong system-level thinking and debugging skills
Se valora
- Experience with SystemVerilog or Verilog
- Background in logic design or hardware architecture
- GPU or processor experience
Beneficios
- Hybrid work arrangement: two days in the office and three days from home
- Significant technical ownership and influence
- Work on advanced silicon and AI/ML-related hardware challenges