Senior ML Hardware Architect
Lead the architecture of high-performance machine-learning compute IP for cloud AI silicon, from concept and modeling through implementation, silicon bring-up, and production.
Responsabilidades
- Lead architectural definition, modeling, and specification of high-performance ML compute IP and accelerator blocks.
- Own ML IP architecture specifications from concept exploration and cycle-accurate modeling through implementation, silicon bring-up, and production.
- Collaborate with AI research, algorithm, and compiler teams to assess architectural trade-offs and define hardware requirements for emerging models.
- Evaluate compute dataflows, numerical formats, sparsity, and specialized acceleration approaches, including KV-cache optimization.
- Project performance, latency, power efficiency, and silicon area across model topologies and workloads.
Requisitos
- Bachelor’s degree in computer engineering, electrical engineering, computer science, a related field, or equivalent practical experience.
- 15 years of experience in computer architecture, ML accelerator design, or high-performance processor architecture.
- Experience leading architectural definition and authoring specifications for silicon or compute IP blocks.
- Experience with performance modeling, workload profiling, and hardware-software co-design.
Se valora
- Master’s degree or PhD in electrical engineering, computer engineering, or computer science focused on computer architecture or ML hardware.
- Five years leading AI/ML accelerator architecture and microarchitecture from concept through production.
- Knowledge of deep-learning workloads and system bottlenecks, including Transformers, MoE, diffusion, inference, KV-cache bandwidth, and interconnect scaling.
- Understanding of high-performance memory subsystems, including custom SRAM, high-bandwidth memory hierarchies, and caching.
- Experience with PyTorch, JAX, or TensorFlow and ML compilers or runtimes such as XLA, TVM, or Triton.