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Senior Verification Engineer
PresencialTiempo completoHardware EngineeringSemiconductors
Senior Verification Engineer responsible for driving verification flows, developing methodologies, and collaborating with cross-functional teams. Requires 8+ years of verification experience, strong System Verilog/UVM skills, and expertise in simulation tools.
Responsabilidades
- Drive differentiated flows and methodologies using Xcelium
- Collaborate with R&D and Application Engineering teams on tool and methodology improvements
- Work closely with top-tier customers to deploy differentiated solutions in Xcelium
- Create product requirements, automate tool flows and methodologies, and establish best practices
Requisitos
- 8+ years of hands-on verification experience
- Strong background in functional verification fundamentals
- Experience working with System Verilog/UVM-based environments
- Strong knowledge of simulator tools such as Xcelium, VCS, or Questa sim
- Excellent communication, debugging, and problem-solving skills
- Good scripting skills (TCL, Python, Perl) for automation
- BSc or MSc in Electrical Engineering or Computer Science
Se valora
- Expertise in Low Power UPF
- Experience with simulation performance and build phases
- Experience with AI tools for productivity, automation, debugging, and verification workflows
Beneficios
- Employee-friendly policies focusing on physical and mental well-being
- Career development and learning opportunities
- Collaborative, diverse, and innovative work environment