Senior Performance Modeling Engineer
Join a networking hardware engineering team developing and evaluating architectures for next-generation switch chips used in AI and high-performance computing systems.
Responsabilidades
- Develop C++ simulation models to define and evaluate architectural options for networking products.
- Analyze networking solutions across performance-related dimensions.
- Identify and assess trade-offs for resolving performance bottlenecks.
- Model communication patterns in deep learning, generative AI, inference, and training applications.
- Explore ideas to improve chip-system performance.
- Collaborate with architecture, microarchitecture, hardware, software, and research teams.
- Lead cross-functional technical workgroups and drive solutions influencing next-generation networking architectures.
Requisitos
- Bachelor’s or master’s degree in Computer Science or Electrical Engineering.
- At least 5 years of hands-on experience.
- Experience with chip design projects and hardware microarchitecture implementation challenges.
- Proficiency in C++ and Python.
- Strong debugging skills.
- Excellent written and verbal communication skills.
- Ability to take ownership and drive technical solutions and initiatives.
Se valora
- Master’s degree in Electrical Engineering, Computer Science, or a related technical field.
- Experience with NVLink, Ethernet, or InfiniBand technologies.
- Demonstrated innovation and ability to lead technologies through product impact.