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Senior PCIe System Design Engineer
PresencialTiempo completoHardware EngineeringComputer Hardware
Seeking a hands-on System Design Engineer to design, implement, and validate PCIe interfaces for SoC products, including silicon bring-up and high-speed connectivity debugging.
Responsabilidades
- Define and implement PCIe Controller and PHY IP configurations.
- Implement PCIe-specific features such as DOE, IDE, MFND, and SR-IOV.
- Integrate PCIe/PHY IPs into the SoC fabric and define Control and Status Registers (CSRs).
- Design power management mechanisms (ASPM, L1 Sub-states) and system reset sequences.
- Perform PCIe link bring-up on silicon, test connectivity, and optimize data paths.
- Troubleshoot complex multi-discipline issues using advanced AI debug tools and protocol analyzers/oscilloscopes.
Requisitos
- 7+ years of experience as a System/Design/Validation Engineer with a strong focus on PCIe.
- Deep expertise in PCIe Gen 4/5 standards (Gen 6 is a major plus).
- Technical knowledge of NVMe protocol (Queue management, Admin/IO commands).
- Hands-on experience with PCIe protocol analyzers and high-speed oscilloscopes.
- Proficient in Python/C for test automation and hardware debugging.
- B.Sc. in Electrical Engineering or Computer Engineering from a leading academic institution.
- Ability to work in a multidisciplinary configuration and collaborate with diverse teams.
Se valora
- Knowledge of PCIe Gen 6 standards.