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Senior Emulation Verification Engineer
Sin especificarTiempo completoHardware EngineeringCloud ComputingConsumer Electronics
Join a silicon engineering team developing and verifying custom hardware for large-scale AI, infrastructure, and consumer products. The role focuses on full-chip and SoC verification using emulation platforms.
Responsabilidades
- Plan and execute digital design block verification based on specifications and defined verification scenarios
- Develop, execute, and debug full-chip and SoC tests on emulation platforms
- Collaborate with design engineers to debug tests and confirm functional correctness
- Define and implement coverage measures for stimulus and corner-case scenarios
- Work with software and post-silicon validation teams to reproduce failures on emulation
- Lead coverage analysis to identify verification gaps and track progress toward tape-out
- Evaluate and implement new verification and emulation methodologies
Requisitos
- Bachelor’s degree in Computer Science, Electrical Engineering, or equivalent practical experience
- At least 8 years of experience with full-chip or SoC verification, including test definition, creation, execution, and debugging
- Experience developing full-chip or SoC tests with ASM, C, C++, Perspec, Threadmill, operating systems, or drivers
- Experience executing and debugging RTL, firmware, and software on hardware emulation or FPGA platforms such as ZeBu Server, Palladium, Veloce, EP, HAPS, or Protium
- Experience with design debug tools such as Verdi or Verisium
- Coding and scripting experience in C, C++, Perl, TCL, or Python
Se valora
- Embedded software and firmware experience, including Linux drivers and firmware validation
- Experience with EDA tools, verification automation, and flow improvements
- Verilog or SystemVerilog design coding experience
- Understanding of SoC architecture and interfaces such as CPU, DDR, PCIe, interconnect, and Ethernet
- Knowledge of RTL-to-emulation and FPGA flows, including emulation testbenches, transactors, accelerated VIPs, hybrid emulation, and in-circuit emulation