Senior DFT Engineering Lead
Lead design-for-test architecture, implementation, verification, and production support for ASIC and silicon projects. Manage DFT planning, execution, quality, and sign-off while mentoring engineers and coordinating with design, verification, and physical design teams.
Responsabilidades
- Lead DFT design, implementation, and verification for ASIC solutions
- Develop DFT strategies and architectures, including hierarchical DFT, MBIST, and ATPG
- Coordinate DFT requirements and dependencies with design, verification, and physical design teams
- Plan team deliverables and provide technical mentoring and guidance
- Lead DFT execution across project planning, implementation, tracking, quality management, and sign-off
- Develop DFT flows, automation, and methodologies
- Support silicon projects through tapeout and production
Requisitos
- Bachelor’s degree in Electrical Engineering, Computer Engineering, or a related field, or equivalent practical experience
- At least 8 years of experience in design for test, from DFT architecture through post-silicon production support
- At least 4 years of people management experience
- Experience with DFT design and verification across multiple projects
- Experience defining DFT specifications, architectures, and insertion
- Experience with DFT techniques, industry tools, physical design flows, and DFT verification flows
- Experience leading DFT activities throughout the ASIC development lifecycle
Se valora
- Master’s degree in Electrical Engineering or a related field
- Post-silicon debug, test, or product engineering experience
- Experience with JTAG and iJTAG protocols and architectures
- Experience with SoC cycles, silicon bring-up, and silicon debug
- Knowledge of fault modeling techniques