Senior DFT Engineer
Join a hardware engineering team developing custom silicon for large-scale consumer and cloud products. Lead design-for-test architecture, implementation, verification, automation, and project execution through tapeout.
Responsabilidades
- Lead design, implementation, and verification of DFT solutions for large-scale ASICs
- Develop DFT strategies and architectures covering hierarchical DFT, MBIST, and ATPG
- Create DFT flows, automation, and methodology
- Coordinate DFT requirements and dependencies with design, verification, and physical design teams
- Manage team workloads, deliverables, and technical guidance
- Lead DFT execution for silicon projects, including planning, tracking, quality management, and sign-off through tapeout
Requisitos
- Bachelor’s degree in Electrical Engineering, Computer Engineering, or a related field, or equivalent practical experience
- At least 8 years of experience with Automatic Test Pattern Generation methods
- Experience across multiple DFT design and verification projects, including specification, architecture, and insertion
- Experience with DFT techniques and tools, ASIC DFT synthesis, simulation, and verification flows
- Experience leading DFT activities throughout an ASIC development lifecycle
Se valora
- Master’s degree in Electrical Engineering or a related field
- Experience with JTAG and iJTAG protocols and architectures
- Experience in post-silicon test or product engineering
- Experience with SoC cycles, silicon bring-up, and silicon debugging
- Knowledge of fault modeling techniques