Junior DFT Engineer
A hardware design team is seeking a junior DFT engineer to develop and validate embedded chip test structures that identify manufacturing defects. The role is based in Tel Aviv-Yafo and offers mentoring in a small, collaborative team.
Responsabilidades
- Insert DFT logic into chip designs
- Perform logic synthesis
- Run Automatic Test Pattern Generation (ATPG)
- Execute gate-level simulations, timing checks, and design rule checks
- Run regression tests
- Debug simulation failures
Requisitos
- B.Sc. or M.Sc. in electrical engineering or computer engineering from a leading Israeli university
- Average grade above 85
- Ability to ramp up quickly across interdisciplinary technical domains
- Collaborative team orientation
Beneficios
- Direct mentoring
- Broad professional growth opportunities
- Collaborative team environment