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CPU Design Verification Engineer
PresencialTiempo completoHardware EngineeringEnterprise SoftwareCloud Computing
Join a hardware research and development team building verification solutions for custom silicon and processor-related designs. The role is based in Israel, with work locations in Tel Aviv or Haifa and in-person interviews generally required.
Responsabilidades
- Plan verification for digital design blocks by interpreting specifications and identifying key verification scenarios.
- Create and enhance constrained-random verification environments using SystemVerilog and UVM, or formally verify designs with SystemVerilog assertions and formal tools.
- Define and implement coverage measures for corner cases.
- Debug verification tests with design engineers.
- Track and close coverage gaps and support verification closure through tape-out.
Requisitos
- Bachelor’s degree in Electrical Engineering or equivalent practical experience.
- At least 4 years of experience creating and using verification components and environments with standard verification methodologies.
- Experience verifying digital logic at the RTL level using SystemVerilog or Specman/E for FPGAs or ASICs.
- Experience with SystemVerilog, UVM, constrained-random testing, coverage analysis, or formal verification.
- Ability to collaborate with design engineers and debug tests to deliver functionally correct design blocks.
Se valora
- Master’s degree or PhD in Electrical Engineering or a related field.
- Experience with ASIC standard interfaces and memory-system architecture.
- Knowledge of verification techniques and the full verification lifecycle.
- Experience with ASIC or ASIC-component performance verification.
- Knowledge of CPU architectures, including pipelines, caches, memory subsystems, instruction sets, and exceptions, such as ARM, x86, or RISC-V.