Вакансии: Разработка — Israel

Entry-level infrastructure role for a recent graduate supporting VLSI CAD and emulation flows, automation, tool integration, and regression environments for edge AI development.

Develop complex real-time and embedded C++ systems, algorithms, and software interfaces while collaborating with multidisciplinary engineering teams in defense and space programs. The role is based in Beer Yaakov, Israel.

Entry-level opportunity for a technically minded professional to support cloud security and Zero Trust deployments across on-premises and cloud environments. The role involves Microsoft security technologies, Azure protection, identity management, and customer implementations.

Join a growing SaaS company and own key areas of its cloud infrastructure, delivery systems, security operations, observability, and reliability. The role supports scalable infrastructure and AI agentic systems across enterprise deployments.

Join a pre-silicon verification team developing semiconductor platforms and products for cloud infrastructure. The role involves RTL verification, hardware verification methodology, and collaboration on advanced system architectures.

Lead the power architecture of next-generation custom system-on-chip designs, balancing performance, thermal constraints, and power delivery across the silicon development lifecycle. The role is based in Tel Aviv or Haifa, Israel.

Join a hardware engineering team developing custom silicon solutions. Maintain emulation infrastructure, improve workflows, build automation, and support debugging and interface bring-up for hardware platforms.

Join a global LiDAR technology company as a Simulation Engineer supporting the mechanical engineering team. Perform thermal, CFD and structural analysis of optomechanical assemblies and collaborate with multidisciplinary R&D teams.

Lead performance modeling and architectural exploration for next-generation networking chips supporting AI and high-performance computing. Collaborate across hardware, software, architecture, and research teams.

Contribute to backend implementation of complex VLSI designs, progressing from RTL toward GDS through physical synthesis, place and route, optimization, timing closure, and verification.