Вакансии: Hardware Engineering — Israel

Responsible for defining and improving manufacturing and assembly processes, providing engineering support, and leading technical documentation and risk assessments for defense/space production.

Join a team building network simulators for next-generation networking chips. Develop cycle-accurate simulation components, analyze switch ASIC performance, and explore architectural optimizations for AI and HPC systems.

Design high-performance ASICs for cloud infrastructure. Contribute to all phases from specification to production, including RTL development, synthesis, timing/power closure, and verification. Collaborate with architecture, software, and verification teams.

Join R&D team to drive digital design and physical implementation of complex SoCs. Responsible for synthesis, place and route, static timing analysis, timing constraints, and full RTL-to-GDSII flow. Requires 4+ years VLSI backend experience and engineering degree.

Join a global semiconductor team designing next-gen CPU cores. Own circuit design blocks, perform transistor-level analysis and PPA optimization, collaborate with cross-functional teams, and contribute to methodology automation. Hybrid work model in Israel.

Responsible for micro-architecture review, UVM-based verification environment implementation, and post-silicon validation of high-scale networking silicon.

Responsible for end-to-end PCB layout, component library management, and collaboration with engineers and manufacturers. Requires 5+ years experience, proficiency in Expedition, and knowledge of IPC standards.

Experienced System Engineer to lead complex multidisciplinary projects from system requirements through integration, acceptance, and delivery. Requires B.Sc. in Engineering or Computer Science and 5+ years of systems engineering experience.

Design and verify next-generation switch silicon chips, focusing on RTL design and dynamic verification. Collaborate with cross-functional teams to deliver high-performance, low-power solutions.

Lead a team transferring DFT technologies to post-silicon for switches, NICs, and SoCs. Define characterization and validation techniques, manage methodology, and coordinate cross-functional teams.