Staff / Principal ASIC Design Engineer
Join an Israel-based semiconductor R&D team developing high-performance digital blocks for AI infrastructure connectivity. Own designs from high-level definition and microarchitecture through RTL implementation, debug, and backend support.
Обязанности
- Own digital logic blocks from high-level definition through microarchitecture, RTL coding, debug, and backend implementation support
- Develop high-performance hardware solutions for complex logic challenges
- Coordinate with architecture, verification, and backend engineering teams
- Use lint, CDC, synthesis, timing, power, and quality-assurance tools to improve design robustness and efficiency
- Apply techniques to meet power, performance, and area targets
- Support verification and validation activities
- Improve design methodologies and contribute to tool automation
- Use AI-assisted engineering tools and develop internal automation
Требования
- Bachelor’s degree in Electrical Engineering or a related technical field
- At least 5 years of logic design experience in the semiconductor industry
- Experience with Verilog and/or SystemVerilog
- Understanding of digital design principles and RTL coding best practices
- Strong communication and cross-functional collaboration skills
Будет плюсом
- Master’s degree in Electrical Engineering or a related field
- Knowledge of DDR and PCIe protocols and implementation
- Understanding of low-power design and power management techniques
- Familiarity with CDC, simulation, debugging, synthesis, and timing analysis
- Proficiency in Python or Perl
- Experience with high-speed serial interface designs or connectivity protocols