Q
Senior Verification Engineer
В офисеПолная занятостьHardware EngineeringQuantum ComputingComputer Hardware
A global leader in quantum computing control systems is seeking a Senior Verification Engineer to develop and own verification environments for full-stack hardware-software products. The role involves creating testbenches, integrating VIPs, and collaborating with engineers and physicists to ensure product quality.
Обязанности
- Own the full verification cycle from planning to coverage closure
- Build verification environments from scratch, including drivers, monitors, and coverage models
- Integrate verification IPs for protocols such as DDR, PCIe, and AXI
- Define verification sequences using complex control-flow constraints
- Develop a system-level understanding of full-stack products with tight HW-SW coupling
- Integrate reference models into the verification flow
- Define test plans and create infrastructure to support verification flows
Требования
- At least 5 years of experience in hardware verification
- Proven ability to ramp up verification environments from scratch
- Experience with UVM and SystemVerilog
- Knowledge of verification IPs and protocols such as PCIe, DDR, and AXI
- Strong understanding of hardware-software interaction
Будет плюсом
- Knowledge of C, C++, Python, or SystemC