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Senior Silicon Test and DFT Engineer
В офисеПолная занятостьHardware EngineeringData Infrastructure
Drive silicon test engineering for advanced AI hardware, from pre-silicon validation and test-program development through product introduction and high-volume manufacturing. The role is based in Haifa or Tel Aviv, Israel, with in-person interviews generally required.
Обязанности
- Develop product bring-up, validation, characterization, qualification, and manufacturing test strategies for advanced HPC products.
- Verify test solutions using pre-silicon simulation or emulation models.
- Develop ATE test modules, binning flows, and test programs for new product integration and high-volume manufacturing.
- Coordinate with ATE vendors, architecture, design, verification, manufacturing, and quality teams.
- Support product sustainment by analyzing volume data, improving yield and test time, assessing test escapes and RMAs, and localizing failures.
- Implement containment and corrective actions through root-cause analysis.
- Build tools, flows, and methodologies to automate and continuously improve the testing lifecycle.
Требования
- Bachelor’s degree in Engineering, Computer Science, a related field, or equivalent practical experience.
- At least 10 years of test engineering experience.
- Experience with pre-silicon validation, test-content generation, ATE program development, and post-silicon enablement from new product introduction through high-volume manufacturing.
- Knowledge of ASIC test methodologies, including MBIST, ATPG, DFT, SerDes, and sensor testing.
- Programming experience in Python, Java, C#, C, or C++.
- Experience with Advantest or Teradyne ATE platforms.
Будет плюсом
- Master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
- Experience with CPU/GPU SoC architecture, design, validation, and debug.
- Experience with advanced testing methods, system-to-tester correlation, yield analysis, and test-time improvement.
- Expertise in automating pre-silicon verification and post-silicon test generation or test-program workflows.