Senior Physical Design Engineer
Join a networking silicon engineering team developing high-speed communication devices. Own physical design activities for blocks and top-level designs while optimizing power, area, and performance.
Обязанности
- Perform block and top-level physical design according to specifications and power, area, and performance constraints.
- Resolve complex timing and congestion issues across challenging designs.
- Execute RTL-to-GDS activities, including synthesis, power and clock distribution, place-and-route, timing closure, power and noise analysis, and physical verification.
- Contribute to physical design flow development.
- Serve as the technical leader and focal point for partition- or unit-level physical design.
Требования
- B.Sc. or M.Sc. in Electrical Engineering or Computer Engineering.
- At least 5 years of physical design experience.
- Proven experience with RTL-to-GDS flows and methodologies.
- Knowledge of place-and-route, static timing analysis, and physical verification flows.
- Familiarity with physical design EDA tools such as Synopsys or Cadence.
- Ability to collaborate effectively as part of an engineering team.
Будет плюсом
- Experience with high-cell-count or high-speed physical design blocks.
- Experience developing physical design flows.