Senior Physical Design Engineer
Design physical implementation for high-speed networking silicon, working across RTL-to-GDS development and optimizing power, area, and performance.
Обязанности
- Implement physical design blocks to specification under demanding power, area, and performance constraints.
- Work on complex designs, resolving timing and congestion issues.
- Contribute to RTL-to-GDS chip development, including synthesis, power and clock distribution, place and route, timing closure, power and noise analysis, and physical verification.
- Participate in physical design flow development.
Требования
- At least 5 years of physical design experience.
- Experience with RTL-to-GDS flows and methodologies.
- Knowledge of physical design workflows, including place and route, static timing analysis, and physical verification.
- Strong understanding of physical implementation and integration.
- Experience with LVS/DRC verification methodologies.
- Familiarity with physical design EDA tools such as Synopsys or Cadence.
- Bachelor’s or master’s degree in electrical or computer engineering, or equivalent work experience.