S
Senior Applications Engineer, Static Timing Analysis
Не указаноПолная занятостьHardware EngineeringSemiconductorEDA Software
Work with customer design teams to integrate and use static timing analysis and engineering change order tools, resolve timing challenges, and improve chip design flows.
Обязанности
- Integrate PrimeTime and PrimeClosure into customer design flows and support pre-sale evaluations and post-sale deployment
- Run competitive benchmarks and document tool performance, accuracy, and capacity
- Deliver customer training and workshops on timing closure, ECO flows, and tool features
- Troubleshoot timing issues involving corners, process variation, crosstalk, and signal integrity
- Recommend design methodologies and present technical solutions to engineering teams and management
- Share customer use cases and technical requirements with R&D and product marketing to inform product development
- Build technical relationships with customers and support successful tapeouts
Требования
- BSEE or equivalent with at least 5 years of relevant experience, or MSEE with at least 3 years, in digital design, timing analysis, or applications engineering
- Experience contributing to at least two tapeouts at 16nm or below, with responsibility for timing closure or ECO implementation
- Hands-on experience with PrimeTime, including static timing analysis, report review, and violation debugging
- Knowledge of static timing analysis, ECO closure, timing corners, process variation, crosstalk, and signal integrity
- Experience with PTECO or PrimeClosure flows, including gate sizing, buffer insertion, and logic restructuring
Будет плюсом
- Familiarity with TCL or Python scripting
Условия и преимущества
- Health, wellness, and financial benefits