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Principal RISC-V CPU Subsystem Architect
В офисеПолная занятостьHardware EngineeringSemiconductor Manufacturing
Lead the architecture and integration of next-generation RISC-V CPU subsystems for modem, connectivity, and embedded control-plane solutions. Own architecture definition, SoC integration, system-level issue resolution, and silicon execution while coordinating global hardware and software teams.
Обязанности
- Own CPU subsystem architecture, including core integration, cache hierarchy, memory, and interconnects.
- Define architecture specifications, integration guidelines, and NoC architecture covering traffic, QoS, and scalability.
- Lead integration into complex SoCs and align CPU RTL, firmware, modeling, verification, and system teams.
- Drive performance, power, and area tradeoffs.
- Diagnose system-level issues across architecture, RTL, design verification, and firmware.
- Lead architecture and design reviews and act as the technical focal point for global teams.
- Guide verification and validation, modem bring-up, commercialization, and resolution of customer or field issues.
- Define technical roadmaps and contribute to short- and long-term product strategy.
- Mentor engineers and guide clear technical documentation and feature descriptions.
Требования
- Bachelor’s degree in computer engineering, computer science, electrical engineering, or a related field; equivalent master’s and doctoral pathways are accepted.
- At least 8 years of relevant engineering experience; the role description also identifies 10+ years as a target.
- Strong experience in CPU and SoC architecture.
- Deep knowledge of cache, memory, and interconnect systems.
- Experience with RISC-V or comparable architectures.
- Strong RTL development experience.
- Experience designing NoC architectures and on-chip interconnects.
- Experience with AXI and CHI protocols.
- Strong problem-solving, technical communication, and cross-functional leadership skills.
Будет плюсом
- Experience owning a CPU or subsystem through the full silicon lifecycle.
- Experience with NoC, interconnect, or DDR systems.
- Understanding of AXI/CHI coherency and system integration.
- Experience with multicore system design and hardware-firmware interaction.
- Experience working in global, cross-functional organizations.
- A master’s degree or PhD in computer engineering, computer science, electrical engineering, or a related field.
- Experience with C, C++, Python, computer architecture, or embedded systems.
- Experience with wireless, semiconductor, embedded software, or WWAN modem development.